Solution-Computer science
Q1.What are two senses in which the term random-access memory is used?
- A memory in which individual words of memory are directly accessed through wired-in addressing logic.
- Semiconductor main memory in which it is possible both to read data from the memory and to write new data into the memory easily and rapidly.
- SRAM is used for cache memory (both on and off chip), and DRAM is used for main memory.
Characteristics DRAM SRAM
Structure One transistor per cell Six transistor per cell
Speed Less speed Faster
Size Less size Larger
Cost Less expensive More Expensive
Q4.What are some applications for ROM?
- Micro-programmed control memory, library subroutines for frequently wanted functions, system programs, and function tables.
P1. Consider a dynamic RAM that must be given a refresh cycle 64 times per ms. Each refresh operation requires 150 ns; a memory cycle requires 250 ns. What percentage of the memory’s total operating time must be given to refreshes?
- In 1 ms, the time devoted to refresh is 64 × 150 ns = 9600 ns. The fraction of time devoted to memory refresh is (9.6 × 10–6 s)/10–3 s = 0.0096, which is approximately 1%.
Sol.
I = C * dV/dt
dt = C * dV/I = 50 * 10-15 * (4.5 – 3) /(9 * 10-12) = 8.33 ms.
Minimum Refreshment Rate Rmin = 1/dt = 0.126 kHz = 126 Hz
P3. How many check bits are needed if the Hamming error correction code is used to detect single bit errors in a 1024-bit data word?
Sol.
Need K check bits such that 2K – 1 ≥ 1024 + K.
The minimum value of K that satisfies this condition is 11.
unIT (FIT), expressed as a rate of failures per billion device hours. Another well-known but less used measure is mean time between failures (MTBF), which is the average time of operation of a particular component until it fails. Consider a 1 MB memory of a 16-bit microprocessor with 256K 1 DRAMs. Calculate its MTBF assuming 2000 FITS for each DRAM.
Sol.
Total memory is 1 megabyte = 8 megabits. It will take 32 DRAMs to construct the memory (32 × 256 Kb = 8 Mb). The composite failure rate is 2000 × 32 = 64,000 FITS. From this, we get a MTBF = 109/64,000 = 15625 hours = 22 months.
P5. The memory of a particular microcomputer is built from 64K 1 DRAMs. According to the data sheet, the cell array of the DRAM is organized into 256 rows. Each row must be refreshed at least once every 4 ms. Suppose we refresh the memory on a strictly periodic basis.
a. What is the time period between successive refresh requests?
b. How long a refresh address counter do we need?
Sol.
a. Assuming the refresh request is issued by a row, the refresh period from row to row must be no greater than 4 ms/256 = 15.625 μs.
b. An 8-bit counter is needed to count 256 rows (28 = 256).